Technical Field
The present invention generally relates to the formation of a strained region on a substrate, and more particularly to the fabrication of a strained channel region for a planar metal-oxide-semiconductor field effect transistor (MOSFET) or fin field effect transistor (finFET).
Description of the Related Art
A Field Effect Transistor (FET) typically has a source, a channel, and a drain, where current flows from the source to the drain, and a gate that controls the flow of current through the channel. Field Effect Transistors (FETs) can have a variety of different structures, for example, FETs have been fabricated with the source, channel, and drain formed in the substrate material itself, where the current flows horizontally (i.e., in the plane of the substrate), and finFETs have been formed with the channel extending outward from the substrate, but where the current also flows horizontally from a source to a drain. The channel for the finFET can be an upright slab, commonly referred to as the fin, with a gate on the fin, as compared to a MOSFET with a gate parallel with the plane of the substrate. Depending on the doping of the source and drain, an n-FET or a p-FET may be formed.
Examples of FETs can include a metal-oxide-semiconductor field effect transistor (MOSFET) and an insulated-gate field-effect transistor (IGFET). Two FETs also may be coupled to form a complementary metal oxide semiconductor (CMOS) devices, where a p-channel MOSFET or finFET and n-channel MOSFET or finFET are coupled together.